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Extensive evaluation of programming models and ISAs impact on multicore soft error reliability
conference contribution
posted on 2019-02-28, 13:31 authored by Felipe da Rosa, Vitor Bandeira, Ricardo Reis, Luciano OstLuciano OstTo take advantage of the performance enhancements provided
by multicore processors, new instruction set architectures (ISAs)
and parallel programming libraries have been investigated across
multiple industrial segments. It is investigated the impact of parallelization libraries and distinct ISAs on the soft error reliability of
two multicore ARM processor models (i.e., Cortex-A9 and CortexA72), running Linux Kernel and benchmarks with up to 87 billion
instructions. An extensive soft error evaluation with more than 1.2
million simulation hours, considering ARMv7 and ARMv8 ISAs and
the NAS Parallel Benchmark (NPB) suite is presented.
History
School
- Mechanical, Electrical and Manufacturing Engineering
Published in
the 55th Annual Design Automation Conference Proceedings of the 55th Annual Design Automation Conference on - DAC '18Citation
ROSA, F.D. .... et al., 2018. Extensive evaluation of programming models and ISAs impact on multicore soft error reliability. IN: Proceedings of the 55th Annual Design Automation Conference (DAC '18), San Francisco, June 24 - 29, Article 178.Publisher
© ACM PressVersion
- AM (Accepted Manuscript)
Publication date
2018Notes
© ACM 2018. This is the author's version of the work. It is posted here for your personal use. Not for redistribution. The definitive Version of Record was published in https://doi.org/10.1145/3195970.3196050ISBN
9781450357005Publisher version
Language
- en