VS_TS #1699 final.pdf (864.25 kB)
3D study of thermal stresses in lead-free surface mount devices
journal contribution
posted on 2008-10-17, 07:42 authored by Pradeep Hegde, David Whalley, Vadim SilberschmidtVadim SilberschmidtThe paper presents the study of non-uniform temperature distributions in a flip
chip electronic assembly, and the use of these temperature distributions to analyse the
thermal stresses in lead-free solder joints in surface mount devices. The thermal stresses
in the solder joints are mainly due to the mismatch in the coefficients of thermal
expansions between the component and substrate materials, and temperature gradient in
the electronic assembly. The thermo-elasto-visco-plastic finite element analysis is carried
out to investigate the extent of thermal stresses induced in solder joints between a surface
mount component and a FR4 circuit board (substrate) under conditions of thermal cycling
with the chip resistor operating at its full power condition. Three different cases of spatial
temperature distributions are considered including one with an experimentally obtained
non-uniform temperature distribution. A comparative study of thermal stresses is
performed using a near-eutectic SnAgCu solder material for three different thermal cases.
History
School
- Mechanical, Electrical and Manufacturing Engineering
Citation
HEGDE, P., WHALLEY, D. and SILBERSCHMIDT, V.V., 2008. 3D study of thermal stresses in lead-free surface mount device. Journal of Thermal Stresses, 31 (11), pp. 1039-1055.Publisher
© Taylor & FrancisVersion
- AM (Accepted Manuscript)
Publication date
2008Notes
This is journal article was published in the Journal of Thermal Stresses [© Taylor & Francis] and the definitive version is available at: http://dx.doi.org/10.1080/01495730802250763ISSN
0149-5739;1521-074XLanguage
- en