An experimental study has been conducted into the effects of package related
failures in plastic encapsulated semiconductors. As a result of an extensive literature
survey particular emphasis was placed on thermal and moisture related failure
mechanisms. A number of accelerated life testing techniques including Highly
Accelerated Stress Testing (HAST) were used to induced parameter drift and
catastrophic failures. Examples of both insertion and surface mount package types
Observations were made on the parameter drift and catastrophic failure
mechanisms of plastic encapsulated Bipolar Junction Transistors in dual in line
packages. Gain degradation was observed to be the most sensitive parameter of those
measured. It is proposed that this is a result of an increase in the extended surface
depletion region area due to a degradation in the surface cleanliness. A theoretical
analysis of the build up these traps is presented.
Package performance test chips were used to monitor the moisture resistance
properties and thermal performance of Quad Flat Pack packages. Surface leakage path
effects, corrosion onset and thermally induced stresses were monitored using this
technique. A computer controlled measurement system was assembled for data
acquisition and logging.
It is believed that these techniques will be of use in the investigation into the
suitability of different package plastic styles for high reliability applications such as
military and aerospace systems.
A Doctoral Thesis. Submitted in partial fulfillment of the requirements for the award of Doctor of Philosophy of Loughborough University.