This thesis details the development of an application specific processor for the
transmission line matrix (TLM) method. The application of TLM to the modelling of
wave propagation in two and three dimensions is introduced with the discussion
focusing on the concept of computational efficiency. Methods for improving
computational efficiency are reviewed, in particular the implementation of TLM on
large scale parallel computers. It is shown that these methods, while increasing
throughput, make inefficient use of available resources. The review of existing
methods is used to define a set of goals for a new class of application specific TLM
The development of an application specific processor based upon the two dimensional
shunt node is presented. This gives rise to an efficient, bit serial scatter processor.
The implementation of this processor within a complete, application specific TLM
system is discussed. The system is based around a unique mapping of the TLM
connect routine to hardware.
The bit serial scatter processor is modified to allow the modelling of inhomogenous
and three dimensional media using the stub loaded shunt node, the symmetrical
condensed node and the symmetrical super condensed node TLM schemes. It is
shown that all four TLM schemes may be implemented within a single architecture
without the introduction of redundant elements through the use of reconfigurable
logic. The implications of interfacing this system to a host PC using the PCI bus are
The processor designs are reviewed within the context of the goals set for the work. It
is shown that all of the goals were successfully met. The implications and limitations
of the processor are discussed.
The thesis concludes with recommendations for areas worthy of further study.
A Doctoral Thesis. Submitted in partial fulfilment of the requirements for the award of Doctor of Philosophy of Loughborough University.