Simulation and implementation of a linear predictive coder

The main objective of this research was to design and build a Linear Predictive Coder (LPC) based on the TMS320 processor, and to incorporate this in the design of a low bit rate voice coding server for a Cambridge Ring. In order to decide on a suitable algorithm for the LPC, extensive simulations were carried out on a BBC computer. The computer used was interfaced to a frame store which, although its original purpose was to store video information, acted as a suitable store for speech. Up to six seconds of speech could be fed in from a microphone in real time for analysis. The BBC was fitted with a second processor, but in spite of this the processing times were very slow. [Continues.]