ANDREWS, J.D., 2001. The use of not logic in fault tree analysis . Quality and Reliability Engineering International, 17 (3), pp. 143-150.
Risk and safety assessments carried out on potentially hazardous industrial systems commonly employ fault tree
analysis to predict the probability or frequency of system failure. Causes of the system failure mode are developed
in an inverted tree structure where the events are linked using logic gates. The type of logic is usually restricted
to AND and OR gates which makes the fault tree structure coherent. The use, directly or indirectly, of the NOT
logic gate is generally discouraged as this can result in a non-coherent structure. Non-coherent structures mean
that components’ working states contribute to the failure of the system. The qualitative and quantitative analysis
of such fault trees can present additional difficulties when compared to the coherent versions. This paper examines
some of the difficulties that can occur, and what potential benefits can be derived from the incorporation of NOT
logic. It is shown that the binary decision diagram (BDD) method can overcome some of the difficulties in the
analysis of non-coherent fault trees.