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Title: A transmission line modelling VLSI processor processor designed with a novel electronic system level methodology
Authors: Chouliaras, V.A.
Flint, James A.
Li, Y.
Issue Date: 2007
Publisher: © IEEE
Citation: CHOULIARAS, V.A., FLINT, J.A. and LI, Y., 2007. A transmission line modelling VLSI processor processor designed with a novel electronic system level methodology. IN: 14th IEEE International Conference on Electronics, Circuits and Systems,(ICECS 2007), Marrakech, 11-14 Dec., pp. 322 - 325
Abstract: This paper discusses the development of a high performance, System-on-Chip (SoC) Transmission Line Modeling (TLM) accelerator designed using novel Electronic System-Level (ESL) flows, from reference C sources. The TLM processor includes a silicon implementation of the 32-bit subset of the IEEE 754 floating point standard, originally part of the Softfloat library. The Floating point core is used extensively in the numerical calculations of the TLM code whereas multiple embedded SRAM components are utilized for array variable storage. Post-behavioral-synthesis, cycle-accurate simulations show a three orders-of-magnitude better runtime performance compared to the reference C code executing on a 100 MHz, 32- bit ASIC processor. At the same time, the TLM processor exhibits greater than 150x performance compared to a 4-way, 200 MHz, 32-bit Chip-multiprocessor (CMP). There results clearly demonstrate the potential of ESL methodologies for accelerating compute-intensive applications, compared to programmable solutions. The proposed ESL-based architecture is applicable to a range of guided and radiated wave problems and is validated in models of a WR-90 waveguide
Description: This is a conference paper [© IEEE]. It is also available from: http://ieeexplore.ieee.org. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Version: Published
DOI: 10.1109/ICECS.2007.4510995
URI: https://dspace.lboro.ac.uk/2134/6134
ISBN: 9781424413775
Appears in Collections:Conference Papers and Contributions (Electronic, Electrical and Systems Engineering)

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