Electrodeposition of indium bumps for ultrafine pitch interconnections

Microelectronics integration continuously follows the trend of miniaturisation for which the technologies enabling fine pitch interconnection are in high demand. The recent advancement in the assembly of Hybrid Pixel Detectors, a high resolution detecting and imaging device, is an example of where novel materials and processes can be applied for ultra-fine pitch interconnections. For this application, indium is often used for the fine pitch bump bonding process due to its unique properties that make it especially suitable, in particular in a cryogenic environment where some types of detector have to serve. Indium bumps are typically fabricated through vacuum evaporation at the wafer level; however, this thesis investigates an alternative low cost manufacturing process at the wafer scale for the deposition of indium micro-bumps through electroplating. The work has placed its emphasis on the requirements of future technologies which will enable a low temperature (<150oC), high density interconnection (> 40,000 IOs/cm2) with a high throughput and high production yield. This research is a systematic investigation of the wafer-scale indium bumping process through electrodeposition using indium sulphamate solution. An intensive experimental study of micro-bump formation has been carried out to elaborate the effects of two of the main electroplating factors that can significantly influence the quality of bumps in the course of electrodeposition, namely the current distribution and mass transport. To adjust the current density distribution, various waveforms of current input, including direct current (DC), unipolar pulse current and bipolar pulse reverse current, were employed in the experiments. To assist mass transportation prior to or during electroplating, acoustic agitation including ultrasonic agitation at 30 kHz frequency as well as megasonic agitation at 1 MHz, were utilised. The electrochemical properties of the indium sulphamate solution were first investigated using non-patterned plain substrates prior to indium bumping trials. This provided understanding of the microstructural characteristics of indium deposits produced by electroplating and, through cathodic polarisation measurements, the highest current density suitable for electrodeposition was achieved as approximately 30 mA/cm2 when electroplating was carried out at room temperature and with no agitation applied. The typical surface morphology of DC electroplated indium contained a granular structure with a surface feature size as large as 10 µm. Pulse and pulse reverse electroplating significantly altered the surface morphology of the deposits and the surface became much smoother. By introducing acoustic agitation, the current density range suitable for electrodeposition could be significantly expanded due to the greater mass transfer, which led to a higher speed of deposition with high current efficiency. Wafer-scale indium bumping (15 µm to 25 µm diameter) at a minimum pitch size of 25 µm was successfully developed through electroplating trials with 3 inch test wafers and subsequently applied onto the standard 4 inch wafers. The results demonstrate the capability of electroplating to generate high quality indium bumps with ultrafine pitch at a high consistency and yield. To maximise the yield, pre-wetting of the ultrafine pitch photoresist patterns by both ultrasonic or megasonic agitation is essential leading to a bumping yield up to 99.9% on the wafer scale. The bump profiles and their uniformity at both the wafer and pattern scale were measured and the effects of electrodeposition regimes on the bump formation evaluated. The bump uniformity and microstructure at the feature scale were also investigated by cross-sectioning the electroplated bumps from different locations on the wafers. The growth mechanism of indium bumps were proposed on the basis of experimental observation. It was found that the use of a conductive current thief ring can homogenise the directional bump uniformity when the electrical contact is made asymmetrically, and improve the overall uniformity when the electrical contact is made symmetrically around the periphery of the wafer. Both unipolar pulse electroplating and bipolar pulse reverse electroplating improved the uniformity of the bump height at the wafer scale and pattern scale, and the feature scale uniformity could be significantly improved by pulse reverse electroplating. The best uniformity of 13.6% for a 4 inch wafer was achieved by using pulse reverse electroplating. The effect of ultrasonic agitation on the process was examined, but found to cause damage to the photoresist patterns if used for extended periods and therefore not suitable for use throughout indium bumping. Megasonic agitation enabled high speed bumping without sacrifice of current efficiency and with little damage to the photoresist patterns. However, megasonic agitation tended to degrade some aspects of wafer scale uniformity and should therefore be properly coupled with other electroplating parameters to assist the electroplating process.